EP1M120F48I6 vs EP1M120F484I6M Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120F48I6 sa pamamagitan ng Intel at EP1M120F484I6M sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120F48I6 | EP1M120F484I6M |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Mercury (Altera) | Mercury (EP1M) |
| Logic Elements / Cells | 4800 | — |
| System Gates | 120,000 | 480,000 (typical) |
| Total User I/O | 303 | — |
| Number of Pins / Terminals | 484 | — |
| Packhaging | 484-BBGA, FCBGA | — |
| Package Code | BGA, Square | BGA, 484 balls, Fine-pitch |
| Terminal Form | Ball | Ball |
| Speed Grade | -6 | -6 (slowest Mercury timing bin) |
| Temperature Grade | Industrial | Industrial |
| Temperature na Operasyon | -40C to +100C | — |
| Core Voltage | 1.8 V | — |
| Transceiver Channels (max) | 8 channels at 1.25 Gbps; remaining 10 channels at <=1.0 Gbps | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, LVDS | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant (M revision) |
| Uri ng Memory | Embedded SRAM / dual-port RAM blocks | — |
| Logic Elements | — | 120,000 |
| LABs / CLBs | — | 303 |
| Flip-Flops | — | 49,152 |
| Embedded Memory (Bits) | — | 4,800 Kb (480 Kbits) |
| Package Type | — | 484-Ball FCBGA |
| Package Shape | — | Square |
| Volte ng Pagbibigay | — | 1.5 V core / 3.3 V aux (per Mercury datasheet) |
| I/O Standards | — | LVTTL, LVCMOS, SSTL, HSTL, LVDS |
| Clock Management | — | PLLs (per Mercury family) |
| Boundary-Scan | — | IEEE 1149.1 / JTAG |