EP1M350F780I8 vs EP1M350F780C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M350F780I8 sa pamamagitan ng Altera at EP1M350F780C8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M350F780I8 | EP1M350F780C8 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Altera Mercury (APEX PLD family) | — |
| System Gates | Approx. 350,000 | — |
| Logic Elements | [DATA_NEEDED: logic element count] | — |
| Embedded Memory | [DATA_NEEDED: embedded RAM bits] | — |
| Packhaging | 780-ball FineLine BGA (F780) | 780-ball FineLine BGA |
| Temperature na Operasyon | -40C to +85C (Industrial) | 0C to +85C (commercial) |
| Temperature Grade | Industrial ('I' suffix) | — |
| Speed Grade | 8 | C8 (commercial, speed bin 8) |
| Process Technology | 0.18 micron CMOS | — |
| Supply Voltage - Core | [DATA_NEEDED: VCCINT] | — |
| Supply Voltage - I/O | Multi-voltage I/O banks supported | — |
| I/O Standard Support | LVTTL, LVCMOS, PCI (per datasheet) | — |
| Configuration Interface | IEEE 1149.1 JTAG | IEEE 1532 / passive serial / JTAG |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | unknown (legacy device) |
| Device Family | — | Altera APEX Mercury (EP1M) |
| Typical Gates | — | 350,000 |
| Maximum Logic Elements (LEs) | — | 12,160 |
| Embedded RAM Blocks | — | 4 dual-port RAM blocks |
| Supply Voltage (Core) | — | [DATA_NEEDED: core Vcc] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards) |
| Global Clock Networks | — | 8 |
| Maximum User I/O | — | [DATA_NEEDED: user I/O count] |
| In-System Programmability | — | Yes (ISP via JTAG) |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |