EP1S10F672C6 vs EP1S10F672I7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S10F672C6 sa pamamagitan ng Intel at EP1S10F672I7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S10F672C6 | EP1S10F672I7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Huling Pagbili |
| Series | Stratix® I | — |
| Family | Stratix FPGA | Stratix |
| Logic Elements (LE) | 10,570 | — |
| Logic Array Blocks (LABs) | 1057 | — |
| Total Memory Bits | 920,448 bits | — |
| Embedded Memory | TriMatrix (MRAM/M4K) | — |
| DSP Blocks | 6 | Yes (dedicated hardware multipliers) |
| Number of I/Os | 345 | — |
| Number of PLLs | 12 (6 per device side) | — |
| Core Voltage | 1.5 V | — |
| Process Technology | 130 nm CMOS | 0.13 um CMOS |
| Packhaging | 672-ball FineLine BGA (FBGA) | FBGA-672, 35 x 35 mm, 1.27 mm pitch |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0 C to +85 C (industrial grade, I7) |
| Maximum Core Frequency | 420.17 MHz | — |
| Configuration Modes | Passive Serial (PS), Fast Passive Parallel (FPP), Active Serial (AS) | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown - verify per lot |
| Logic Elements | — | 10,570 |
| User I/O Pins | — | 345 |
| Core Supply Voltage | — | 1.5 V |
| Maximum Internal Clock | — | 420.17 MHz (per datasheet) |
| Logic Family | — | CMOS |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Total Pins | — | 672 (FBGA) |
| Configuration Method | — | JTAG / serial / parallel PROM |
| Uri ng Memory | — | TriMatrix embedded block RAM + distributed RAM |