EP1S10F672C7N vs EP1S10F672C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S10F672C7N sa pamamagitan ng Altera at EP1S10F672C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S10F672C7N | EP1S10F672C7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | Stratix | — |
| Logic Elements / Cells | 10,570 | — |
| Number of LABs/CLBs | 1,057 | — |
| Total RAM Bits | 920,448 | — |
| Number of User I/Os | 345 | — |
| Number of Gates | [DATA_NEEDED: total gate count] | — |
| DSP Blocks | 6 | — |
| Package Type | 672-BBGA (FBGA) 35 x 35 mm, 1.27 mm pitch | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | — |
| Maximum Operating Frequency | 420.17 MHz | — |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0 C to 85 C (Commercial) |
| Configuration Method | SRAM, JTAG, passive/active serial/parallel | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | unknown |
| Level ng MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Family | — | Stratix |
| Logic Elements | — | 10,570 |
| Embedded Memory | — | 920,448 bits |
| User I/Os | — | 345 |
| Packhaging | — | 672-pin FBGA (FineLine BGA) |
| Package Dimensions | — | 35 x 35 mm, 1.27 mm pitch |
| Core Voltage (VCCINT) | — | 1.5 V |
| Logic Cells | — | 10,570 |
| LABs (Logic Array Blocks) | — | 1,057 |
| I/O Standards | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL |
| Configuration Mode | — | JTAG, Passive Serial, Active Serial |