EP1S20B672C6N vs EP1S20F672C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S20B672C6N sa pamamagitan ng Intel at EP1S20F672C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S20B672C6N | EP1S20F672C7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Family | Stratix | Altera Stratix FPGA |
| Series | EP1S20 | Stratix |
| Logic Elements (LE) | 18,460 | — |
| Logic Array Blocks (LAB) | 1,846 | — |
| Embedded Memory | 1,669,248 bits | — |
| Maximum User I/O | 426 | — |
| Process Technology | 130 nm CMOS | — |
| Core Voltage | 1.5 V | — |
| Packhaging | 672-ball BGA (672-BBGA), 35 x 35 mm, 1.27 mm pitch | 672-ball FineLine BGA (35 x 35 mm, 1.27 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 C to +85 C (Commercial) | 0C to 85C (commercial) |
| Speed Grade | 6 | C7 |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | — |
| Tindminan RoHS | Compliant | unknown |
| Katayuan ng Lifecycle | Not Recommended for New Designs (NRND) | — |
| Logic Elements (LEs) | — | 18,460 |
| Embedded Memory Bits | — | 1,669,248 |
| User I/O Pins | — | 426 |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Logic Family | — | CMOS, SRAM-based |
| Core Supply Voltage | — | 1.5 V |
| Configuration Modes | — | JTAG, Passive Serial, Fast Passive Parallel, Active Serial |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |
| Clock PLLs | — | Up to 10 |