EP1S20B672C6N vs EP1S20F672C7 比較
詳細並排比較 EP1S20B672C6N 由 Intel 與 EP1S20F672C7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S20B672C6N | EP1S20F672C7 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | 最後購買 |
| Family | Stratix | Altera Stratix FPGA |
| Series | EP1S20 | Stratix |
| Logic Elements (LE) | 18,460 | — |
| Logic Array Blocks (LAB) | 1,846 | — |
| Embedded Memory | 1,669,248 bits | — |
| Maximum User I/O | 426 | — |
| Process Technology | 130 nm CMOS | — |
| Core Voltage | 1.5 V | — |
| 封裝 | 672-ball BGA (672-BBGA), 35 x 35 mm, 1.27 mm pitch | 672-ball FineLine BGA (35 x 35 mm, 1.27 mm pitch) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0 C to +85 C (Commercial) | 0C to 85C (commercial) |
| Speed Grade | 6 | C7 |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | — |
| RoHS 狀態 | Compliant | unknown |
| 生命週期狀態 | Not Recommended for New Designs (NRND) | — |
| Logic Elements (LEs) | — | 18,460 |
| Embedded Memory Bits | — | 1,669,248 |
| User I/O Pins | — | 426 |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Logic Family | — | CMOS, SRAM-based |
| Core Supply Voltage | — | 1.5 V |
| Configuration Modes | — | JTAG, Passive Serial, Fast Passive Parallel, Active Serial |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |
| Clock PLLs | — | Up to 10 |