EP1S20B672C7N vs EP1S20F672I7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S20B672C7N sa pamamagitan ng Intel at EP1S20F672I7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1S20F672I7 - Stratix FPGA, 18,460 LEs, 672-BGA | Intel / Altera
EP1S20F672I7 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1S20B672C7N | EP1S20F672I7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | Stratix | — |
| Family | Stratix (original) | Stratix (first generation) |
| Process Technology | 0.13 µm CMOS | — |
| Logic Elements (LEs) | 18,460 | 18,460 |
| LABs / CLBs | 1,846 | — |
| Embedded Memory Bits | 1,669,248 bits | — |
| Maximum User I/O | 426 | — |
| Number of Pins / Balls | 672 | 672 |
| Package Type | 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) | — |
| Supply Voltage (Core, VCCINT) | 1.5 V | — |
| Temperature na Operasyon | 0 °C to 85 °C (Commercial Extended) | -40C to +85C (industrial grade, I7 suffix) |
| Speed Grade | -7 | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Level ng MSL | 3 (per JEDEC J-STD-020) | unknown |
| Logic Family | CMOS | CMOS |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Maximum RAM Bits | — | 1,669,248 |
| DSP Blocks | — | [DATA_NEEDED: exact DSP block count] |
| Maximum User I/Os | — | 426 |
| Supply Voltage (VCCINT core) | — | 1.5 V |
| Packhaging | — | 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch |
| Configuration Modes | — | Passive Serial, Passive Parallel, JTAG |
| Clock Management PLLs | — | [DATA_NEEDED: PLL count] |
| Lead-Free / Finish | — | SnPb (e0 per Partstack datasheet extract) |
| Status | — | Last Time Buy (per distributor notices) |