EP1S20B672C7N vs EP1S20F672I7 比較
詳細並排比較 EP1S20B672C7N 由 Intel 與 EP1S20F672I7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S20B672C7N | EP1S20F672I7 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Series | Stratix | — |
| Family | Stratix (original) | Stratix (first generation) |
| Process Technology | 0.13 µm CMOS | — |
| Logic Elements (LEs) | 18,460 | 18,460 |
| LABs / CLBs | 1,846 | — |
| Embedded Memory Bits | 1,669,248 bits | — |
| Maximum User I/O | 426 | — |
| Number of Pins / Balls | 672 | 672 |
| Package Type | 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) | — |
| Supply Voltage (Core, VCCINT) | 1.5 V | — |
| 工作溫度 | 0 °C to 85 °C (Commercial Extended) | -40C to +85C (industrial grade, I7 suffix) |
| Speed Grade | -7 | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| MSL 等級 | 3 (per JEDEC J-STD-020) | unknown |
| Logic Family | CMOS | CMOS |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Maximum RAM Bits | — | 1,669,248 |
| DSP Blocks | — | [DATA_NEEDED: exact DSP block count] |
| Maximum User I/Os | — | 426 |
| Supply Voltage (VCCINT core) | — | 1.5 V |
| 封裝 | — | 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch |
| Configuration Modes | — | Passive Serial, Passive Parallel, JTAG |
| Clock Management PLLs | — | [DATA_NEEDED: PLL count] |
| Lead-Free / Finish | — | SnPb (e0 per Partstack datasheet extract) |
| Status | — | Last Time Buy (per distributor notices) |