EP1S20F672I7 vs EP1S20F672C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S20F672I7 sa pamamagitan ng Intel at EP1S20F672C6 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1S20F672I7 - Stratix FPGA, 18,460 LEs, 672-BGA | Intel / Altera
EP1S20F672I7 ⚠ Huling Pagbili
Pagsanggunian na paghahambing
| Parametro | EP1S20F672I7 | EP1S20F672C6 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | Stratix (first generation) | Stratix (first generation) |
| Logic Elements (LEs) | 18,460 | 18,460 |
| Maximum RAM Bits | 1,669,248 | — |
| DSP Blocks | [DATA_NEEDED: exact DSP block count] | — |
| Maximum User I/Os | 426 | 426 |
| Supply Voltage (VCCINT core) | 1.5 V | — |
| Logic Family | CMOS | — |
| Packhaging | 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch | 672-ball FineLine BGA |
| Temperature na Operasyon | -40C to +85C (industrial grade, I7 suffix) | 0°C to +85°C (Commercial) |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | — |
| Number of Pins / Balls | 672 | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Clock Management PLLs | [DATA_NEEDED: PLL count] | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free / Finish | SnPb (e0 per Partstack datasheet extract) | — |
| Level ng MSL | unknown | — |
| Status | Last Time Buy (per distributor notices) | — |
| Manufacturer | — | Altera (now Intel) |
| Series | — | Stratix |
| Process Technology | — | 0.13 µm CMOS |
| Logic Array Blocks (LABs) | — | 1,846 |
| Embedded Memory Bits | — | 1,669,248 |
| Package Code | — | F672 |
| Speed Grade | — | C6 |
| Volte ng Pagbibigay | — | Core 1.5 V, I/O programmable |