EP1S25F1020I6N vs EP1S25F1020C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S25F1020I6N sa pamamagitan ng Intel at EP1S25F1020C6N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S25F1020I6N | EP1S25F1020C6N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Stratix | Stratix |
| Logic Cells | 25,660 | 25,660 |
| Logic Array Blocks (LABs) | 2,566 | — |
| Embedded Memory | 1,944,576 bits | — |
| User I/Os | 706 | — |
| Maximum User I/O Pins | 706 | — |
| Core Voltage | 1.5 V | — |
| Technology Node | 130 nm CMOS | — |
| Packhaging | 1020-ball FC-FBGA (33 × 33 mm, 1 mm pitch) | 1020-ball FC-FBGA (33 x 33 mm, 1.0 mm pitch) |
| Bilang ng Pin | 1020 | — |
| Temperature na Operasyon | 0 °C to +85 °C (industrial, I6) | 0C to +85C (Commercial) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Device Family | Stratix FPGA | — |
| Logic Family | CMOS | — |
| Lead-Free / RoHS | RoHS compliant per Altera / Intel product page | — |
| Logic Elements (LE) | — | 25,660 |
| Embedded Memory (bits) | — | 1,944,576 |
| User I/O Pins | — | 706 |
| LABs (Logic Array Blocks) | — | 2,566 |
| Process Technology | — | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| Maximum Internal Clock Frequency | — | 450.05 MHz |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |
| Configuration Method | — | JTAG or EPC configuration device |
| Family Generation | — | Stratix (1st generation) |