EP1S25F1020I6N vs EP1S25F1020C6N 比較
詳細並排比較 EP1S25F1020I6N 由 Intel 與 EP1S25F1020C6N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S25F1020I6N | EP1S25F1020C6N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Stratix | Stratix |
| Logic Cells | 25,660 | 25,660 |
| Logic Array Blocks (LABs) | 2,566 | — |
| Embedded Memory | 1,944,576 bits | — |
| User I/Os | 706 | — |
| Maximum User I/O Pins | 706 | — |
| Core Voltage | 1.5 V | — |
| Technology Node | 130 nm CMOS | — |
| 封裝 | 1020-ball FC-FBGA (33 × 33 mm, 1 mm pitch) | 1020-ball FC-FBGA (33 x 33 mm, 1.0 mm pitch) |
| 腳位數 | 1020 | — |
| 工作溫度 | 0 °C to +85 °C (industrial, I6) | 0C to +85C (Commercial) |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| Device Family | Stratix FPGA | — |
| Logic Family | CMOS | — |
| Lead-Free / RoHS | RoHS compliant per Altera / Intel product page | — |
| Logic Elements (LE) | — | 25,660 |
| Embedded Memory (bits) | — | 1,944,576 |
| User I/O Pins | — | 706 |
| LABs (Logic Array Blocks) | — | 2,566 |
| Process Technology | — | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| Maximum Internal Clock Frequency | — | 450.05 MHz |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS status] |
| Configuration Method | — | JTAG or EPC configuration device |
| Family Generation | — | Stratix (1st generation) |