EP1S25F672C7N vs EP1S25F672C8N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP1S25F672C7N sa pamamagitan ng Altera at EP1S25F672C8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP1S25F672C7N EP1S25F672C8N
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Device Family Stratix —
Logic Elements (LEs) 25,660 —
Logic Array Blocks (LABs) 2,566 —
Embedded Memory Bits 1,944,576 —
Maximum User I/O 473 426
Number of I/O Pins 672 (BGA balls) —
Packhaging 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch —
Process Technology 0.13 µm CMOS 130 nm CMOS
Core Supply Voltage (VCCINT) 1.5 V —
I/O Supply Voltage (VCCIO) [DATA_NEEDED: bank-dependent 1.2 V–3.3 V] —
Temperature na Operasyon 0 °C to 85 °C (commercial) 0 °C to 85 °C (commercial)
Uri ng Pagpapasok Surface Mount —
Configuration Method JTAG / Passive Serial / Active Serial —
Level ng MSL [DATA_NEEDED: MSL rating] —
Tindminan RoHS [DATA_NEEDED: confirm from product page] Compliant (lead-free N suffix)
Family — Stratix (EP1S)
Logic Elements (LE) — 25,660
Core Supply Voltage — 1.5 V
Embedded Memory — 1,944 Kbit (TriMatrix)
DSP Blocks — 12 (9-bit x 9-bit multipliers)
PLLs — 6
Speed Grade — C8 (-8)
Package Type — 672-ball FineLine BGA (FBGA)
Package Dimensions — 35 x 35 mm, 1.27 mm pitch
Logic Family — CMOS
Maximum Internal Frequency — 357.14 MHz
Configuration — Passive Serial / Passive Parallel / JTAG / EPC device
Origin — Altera (acquired by Intel, 2015)

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