EP1S25F672C7N vs EP1S25F672C8N 比較
詳細並排比較 EP1S25F672C7N 由 Altera 與 EP1S25F672C8N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S25F672C7N | EP1S25F672C8N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | Stratix | — |
| Logic Elements (LEs) | 25,660 | — |
| Logic Array Blocks (LABs) | 2,566 | — |
| Embedded Memory Bits | 1,944,576 | — |
| Maximum User I/O | 473 | 426 |
| Number of I/O Pins | 672 (BGA balls) | — |
| 封裝 | 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch | — |
| Process Technology | 0.13 µm CMOS | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: bank-dependent 1.2 V–3.3 V] | — |
| 工作溫度 | 0 °C to 85 °C (commercial) | 0 °C to 85 °C (commercial) |
| 安裝類型 | Surface Mount | — |
| Configuration Method | JTAG / Passive Serial / Active Serial | — |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| RoHS 狀態 | [DATA_NEEDED: confirm from product page] | Compliant (lead-free N suffix) |
| Family | — | Stratix (EP1S) |
| Logic Elements (LE) | — | 25,660 |
| Core Supply Voltage | — | 1.5 V |
| Embedded Memory | — | 1,944 Kbit (TriMatrix) |
| DSP Blocks | — | 12 (9-bit x 9-bit multipliers) |
| PLLs | — | 6 |
| Speed Grade | — | C8 (-8) |
| Package Type | — | 672-ball FineLine BGA (FBGA) |
| Package Dimensions | — | 35 x 35 mm, 1.27 mm pitch |
| Logic Family | — | CMOS |
| Maximum Internal Frequency | — | 357.14 MHz |
| Configuration | — | Passive Serial / Passive Parallel / JTAG / EPC device |
| Origin | — | Altera (acquired by Intel, 2015) |