EP1S40B956C6N vs EP1S40B956C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S40B956C6N sa pamamagitan ng Intel at EP1S40B956C6 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S40B956C6N | EP1S40B956C6 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Series | Stratix | — |
| Family | Altera Stratix (1st generation) | Stratix |
| Process Technology | 0.13 µm CMOS | 0.13 um CMOS |
| Logic Elements (LEs) | 41,250 | — |
| Logic Array Blocks (LABs) | 4,125 | 4,125 |
| Embedded Memory | 3,423,744 bits (~3.4 Mbit) | TriMatrix (M512, M4K, M-RAM blocks) |
| Maximum User I/O | 683 | — |
| Volte ng Pagbibigay | 1.425 V to 1.575 V (1.5 V nominal) | — |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial) | 0C to 85C |
| Packhaging | 956-ball FineLine BGA (FCBGA) | BGA-956 (956-BBGA, FCBGA) |
| Package Dimensions | 40 mm x 40 mm | — |
| Ball Pitch | 1.27 mm | 1.27 mm |
| Speed Grade | C6 (commercial, mid-speed) | 6 (commercial, slowest) |
| Configuration Interface | JTAG (IEEE 1149.1), Passive Serial, Active Serial | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Logic Elements / Cells | — | 41,250 |
| CLB Equivalents / Registers | — | 46,970 |
| User I/O Pins | — | 683 |
| Package Size | — | 40 x 40 mm |
| Core Supply Voltage | — | 1.5 V |
| Logic Family | — | CMOS |
| DSP Blocks | — | Embedded multiplier blocks |
| PLLs | — | Multiple phase-locked loops |
| Lead-Free / RoHS | — | Per Altera/Intel datasheet |