EP1S60F1020C7N vs EP1S60F1020C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S60F1020C7N sa pamamagitan ng Intel at EP1S60F1020C6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S60F1020C7N | EP1S60F1020C6N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Series | Stratix | Stratix |
| Family | Stratix (EP1S) | Stratix (EP1S) |
| Logic Elements (LE) | 57120 | — |
| Logic Array Blocks (LABs) | 5712 | — |
| Embedded Memory (bits) | 5,215,104 | — |
| Maximum User I/O | 773 | — |
| Packhaging | 1020-ball FC-FBGA | — |
| Package Size | 33 mm x 33 mm, 1.0 mm pitch | — |
| Process Technology | 130 nm CMOS | — |
| Core Supply Voltage | 1.5 V | — |
| Temperature na Operasyon | 0 °C to 85 °C (Commercial) | 0°C to +85°C (Commercial) |
| Speed Grade | C7 | C6 (mid-tier) |
| Maximum Internal Frequency | 420.17 MHz | — |
| Embedded PLLs | 6 | — |
| DSP Blocks (18x18 multipliers) | Yes | — |
| Configuration Modes | PS, PPS, PPA, JTAG | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant (per 'N' suffix) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Logic Elements (LEs) | — | 57,120 |
| Logic Cells | — | 6,570 blocks (per chipdig datasheet summary) |
| Embedded RAM (Total Bits) | — | 5,215,104 bits |
| Embedded Multipliers | — | 773 (18x18) |
| Maximum User I/O Pins | — | Per datasheet, package-dependent (F1020 variant) |
| Package Type | — | 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch |
| Logic Family / Process | — | CMOS, 0.13 µm |
| Volte ng Pagbibigay | — | Per datasheet (Stratix Device Handbook Vol. 1) |
| Lead-Free / Pb-Free | — | Yes (suffix 'N') |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |
| Configuration | — | JTAG / Passive Serial / Fast Passive Parallel via MSEL pins |
| PLL Count | — | 12 (per Stratix family datasheet) |
| Memory Block Types | — | TriMatrix (M512, M4K, M-RAM) |