EP1S60F1020I6 vs EP1S60F1020C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S60F1020I6 sa pamamagitan ng Altera at EP1S60F1020C6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1S60F1020I6 - Stratix 57K LEs FPGA 1020-BGA | Intel / Altera
EP1S60F1020I6 ⚠ Huling Pagbili
Pagsanggunian na paghahambing
| Parametro | EP1S60F1020I6 | EP1S60F1020C6N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | Stratix | Stratix (EP1S) |
| Logic Elements | 57,120 | — |
| Logic Array Blocks (LABs) | 6,570 | — |
| Embedded Memory Bits | 5,215,104 bits | — |
| Maximum User I/O | 773 | — |
| Process Technology | 130 nm CMOS | — |
| Core Supply Voltage | 1.5 V | — |
| Maximum Internal Frequency | 450 MHz | — |
| Packhaging | 1020-ball FC-FBGA (33 x 33 mm, 1 mm pitch) | — |
| Operating Temperature (I-grade) | -40C to +100C (case) | — |
| Speed Grade | -6 | C6 (mid-tier) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Tindminan RoHS | Compliant | Compliant (per 'N' suffix) |
| Lead-Free | Yes | — |
| Level ng MSL | 3 | [DATA_NEEDED: MSL rating] |
| Series | — | Stratix |
| Logic Elements (LEs) | — | 57,120 |
| Logic Cells | — | 6,570 blocks (per chipdig datasheet summary) |
| Embedded RAM (Total Bits) | — | 5,215,104 bits |
| Embedded Multipliers | — | 773 (18x18) |
| Maximum User I/O Pins | — | Per datasheet, package-dependent (F1020 variant) |
| Package Type | — | 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch |
| Logic Family / Process | — | CMOS, 0.13 µm |
| Temperature na Operasyon | — | 0°C to +85°C (Commercial) |
| Volte ng Pagbibigay | — | Per datasheet (Stratix Device Handbook Vol. 1) |
| Lead-Free / Pb-Free | — | Yes (suffix 'N') |
| Configuration | — | JTAG / Passive Serial / Fast Passive Parallel via MSEL pins |
| PLL Count | — | 12 (per Stratix family datasheet) |
| Memory Block Types | — | TriMatrix (M512, M4K, M-RAM) |