EP1S60F1020I6N vs EP1S60F1020C6N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP1S60F1020I6N sa pamamagitan ng Altera at EP1S60F1020C6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP1S60F1020I6N EP1S60F1020C6N
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Series Stratix Stratix
Family Stratix FPGA (1st generation) Stratix (EP1S)
Logic Elements (LEs) 57,120 57,120
Logic Array Blocks (LABs) 5,712 —
Logic Cells 6,570 6,570 blocks (per chipdig datasheet summary)
Total RAM Bits 5,215,104 —
User I/O Count 773 —
Hanay ng Temperature na Operasyon 0°C to 85°C (I6 grade) —
Volte ng Pagbibigay 1.425 V to 1.575 V (1.5 V nominal core) Per datasheet (Stratix Device Handbook Vol. 1)
Process Node 0.13 µm CMOS —
Packhaging 1020-FBGA (33 x 33 mm, 1.0 mm pitch) —
Speed Grade 6 C6 (mid-tier)
Temperature Grade I (Industrial) —
Uri ng Pagpapasok Surface Mount (BGA) Surface Mount (BGA)
Level ng MSL [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL rating]
Tindminan RoHS Compliant Compliant (per 'N' suffix)
Embedded RAM (Total Bits) — 5,215,104 bits
Embedded Multipliers — 773 (18x18)
Maximum User I/O Pins — Per datasheet, package-dependent (F1020 variant)
Package Type — 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch
Logic Family / Process — CMOS, 0.13 µm
Temperature na Operasyon — 0°C to +85°C (Commercial)
Lead-Free / Pb-Free — Yes (suffix 'N')
Configuration — JTAG / Passive Serial / Fast Passive Parallel via MSEL pins
PLL Count — 12 (per Stratix family datasheet)
Memory Block Types — TriMatrix (M512, M4K, M-RAM)

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita