EP1S60F1020I6N vs EP1S60F1020C6N 比較

詳細並排比較 EP1S60F1020I6N 由 Altera 與 EP1S60F1020C6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1S60F1020I6N EP1S60F1020C6N
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Series Stratix Stratix
Family Stratix FPGA (1st generation) Stratix (EP1S)
Logic Elements (LEs) 57,120 57,120
Logic Array Blocks (LABs) 5,712 —
Logic Cells 6,570 6,570 blocks (per chipdig datasheet summary)
Total RAM Bits 5,215,104 —
User I/O Count 773 —
工作溫度範圍 0°C to 85°C (I6 grade) —
供應電壓 1.425 V to 1.575 V (1.5 V nominal core) Per datasheet (Stratix Device Handbook Vol. 1)
Process Node 0.13 µm CMOS —
封裝 1020-FBGA (33 x 33 mm, 1.0 mm pitch) —
Speed Grade 6 C6 (mid-tier)
Temperature Grade I (Industrial) —
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
MSL 等級 [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL rating]
RoHS 狀態 Compliant Compliant (per 'N' suffix)
Embedded RAM (Total Bits) — 5,215,104 bits
Embedded Multipliers — 773 (18x18)
Maximum User I/O Pins — Per datasheet, package-dependent (F1020 variant)
Package Type — 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch
Logic Family / Process — CMOS, 0.13 µm
工作溫度 — 0°C to +85°C (Commercial)
Lead-Free / Pb-Free — Yes (suffix 'N')
Configuration — JTAG / Passive Serial / Fast Passive Parallel via MSEL pins
PLL Count — 12 (per Stratix family datasheet)
Memory Block Types — TriMatrix (M512, M4K, M-RAM)

資料表與資源

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