EP1SGX25DF1020C6ESL vs EP1SGX25DF1020C5ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX25DF1020C6ESL sa pamamagitan ng Altera at EP1SGX25DF1020C5ES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1SGX25DF1020C6ESL - Stratix GX FPGA, 25K LE, 1020-BGA | Altera/Intel
EP1SGX25DF1020C6ESL ObsoleteAltera
EP1SGX25DF1020C5ES - Stratix GX FPGA, 25K LE, FBGA-1020 | Altera
EP1SGX25DF1020C5ES ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1SGX25DF1020C6ESL | EP1SGX25DF1020C5ES |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Stratix GX | — |
| Logic Elements | 25,660 | — |
| Total RAM Bits | 1,944,576 bits | — |
| User I/O Pins | 607 | — |
| LABs/CLBs | 2,566 | — |
| Packhaging | 1020-BBGA (FineLine BGA) | — |
| Core Voltage | 1.5 V | — |
| Temperature ng Junction na Operasyon | 0 C to 85 C | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | — |
| Process Node | 0.13 um CMOS | — |
| Transceivers | Embedded multi-gigabit transceivers (per Stratix GX family) | — |
| DSP Blocks | Yes (embedded DSP blocks) | — |
| Speed Grade | C6 | C5 |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family) | — |
| Device Family | — | Stratix GX |
| Logic Family | — | CMOS |
| Logic Elements (LEs) | — | 25,660 |
| Configurable Logic Blocks (CLBs) | — | 2,566 |
| Embedded Memory | — | 1,944,576 bits |
| Process Technology | — | 130 nm |
| Core Supply Voltage | — | 1.5 V |
| Package Type | — | FBGA-1020 (FineLine BGA) |
| Package Dimensions | — | 33 x 33 mm |
| Ball Pitch | — | 1.00 mm |
| Lead-Free | — | Yes |
| Temperature na Operasyon | — | 0 °C to 85 °C (commercial) |
| Part Variant Suffix | — | ES (Engineering Sample) |
| Configuration Interface | — | JTAG (IEEE 1149.1) / Passive Serial |