EP20K1000EBC652-2X vs EP20K1000EFI672-2X Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K1000EBC652-2X sa pamamagitan ng Altera at EP20K1000EFI672-2X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K1000EBC652-2X EP20K1000EFI672-2X
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND NRND
Family APEX-20KE APEX-20KE
Device Logic Elements 38,400 —
Typical Gates 1,000,000 system gates —
Embedded Memory Bits 327,680 bits —
User I/O Pins 488 —
Maximum User I/O 488 —
Propagation Delay 1.6 ns 1.6 ns
Internal Maximum Frequency 350 MHz —
Logic Blocks / Macros 2,560 macros —
PLLs 4 —
Core Voltage 1.8 V 1.8 V
Process Technology 0.22 µm (some sources 0.15 µm) all-layer copper-metal CMOS 0.15 micron all-layer copper-metal
Packhaging 652-pin FCBGA / PBGA (45 x 45 mm, 1.27 mm pitch) —
Uri ng Pagpapasok Surface Mount Surface Mount
Temperature na Operasyon 0 °C to +85 °C (commercial) 0C to +85C
Configuration Interface JTAG (IEEE 1149.1), Passive Serial, Altera configuration —
Tindminan RoHS Compliant [DATA_NEEDED: RoHS status]
Device Type — SPLD / FPGA
Logic Elements / Cells — 38400
System Gates — 1,000,000
Number of Macros — 2560
Embedded Memory (Bits) — 327680
User I/Os — 508
Number of I/O Banks — [DATA_NEEDED: I/O banks]
I/O Voltage Support — 1.8 V / 2.5 V / 3.3 V
Package Type — 672-BBGA (FineLine BGA, 45 x 45 mm, 1.27 mm pitch)
JTAG Support — IEEE 1149.1 boundary-scan
PLL Count — 4
Speed Grade — -2X
Level ng MSL — [DATA_NEEDED: MSL level]

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