EP20K200BC484-1X vs EP20K200CF484C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200BC484-1X sa pamamagitan ng Altera at EP20K200CF484C7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K200BC484-1X - APEX-20K 200K-Gate FPGA 382 I/O 484-BGA | Altera
EP20K200BC484-1X ObsoleteAltera
EP20K200CF484C7N - APEX-20K 200K Gates FPGA 484-FBGA | Intel/Altera
EP20K200CF484C7N ObsoletePagsanggunian na paghahambing
| Parametro | EP20K200BC484-1X | EP20K200CF484C7N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Family | APEX-20K | — |
| Series | EP20K200 | APEX-20K |
| Logic Elements / Cells | 8320 | 8,320 |
| Total RAM Bits | 106496 | 106,496 |
| Number of I/O | 382 | 382 |
| Number of Logic Gates | 200000 | — |
| Package Type | 484-BBGA (Fine-pitch Ball Grid Array) | — |
| Package Suffix | BC484 | — |
| Speed Grade | -1 (slowest commercial grade) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +85C (commercial, [DATA_NEEDED: full Tjj range]) | 0C to +85C (commercial grade) |
| Configuration Method | SRAM - external serial/parallel PROM | SRAM-based, in-system reconfigurable |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| PLL | ClockLock / ClockBoost | — |
| Embedded Memory Blocks | Embedded System Blocks (ESBs) - RAM/ROM/CAM | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Number of Gates (typical) | — | 200,000 |
| Voltage - Supply (VCCINT) | — | 1.71 V to 1.89 V |
| Packhaging / Kaso | — | 484-BBGA (FineLine BGA) |
| Supplier Device Package | — | 484-FBGA (23x23 mm) |
| Number of PLLs | — | 4 |
| Embedded Array Blocks (EABs) | — | Configurable as RAM/ROM/FIFO |
| Programmable Logic Blocks | — | APEX LAB architecture |
| MultiVolt I/O Support | — | 1.8V / 2.5V / 3.3V / 5V |
| Katayuan ng Lifecycle | — | Obsolete (Altera/Intel APEX-20K family EOL) |