EP20K200CF484C7ES vs EP20K200CF484C8ES Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200CF484C7ES sa pamamagitan ng Intel at EP20K200CF484C8ES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EP20K200CF484C8ES EP20K200CF484C8ES - APEX-20KC 200K Gates FPGA | Altera

EP20K200CF484C8ES - APEX-20KC 200K Gates FPGA | Altera

EP20K200CF484C8ES ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EP20K200CF484C7ES EP20K200CF484C8ES
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Huling Pagbili
Family APEX-20KC APEX 20K
Series APEX 20KC APEX-20KC
Logic Elements / Cells 8,320 —
Typical Gates 200,000 —
Number of LABs/CLBs 376 —
Total RAM Bits 106,496 —
Number of I/O 377 (max) —
Voltage - Supply 1.8 V core —
Temperature na Operasyon 0C to +85C (commercial) 0C to +85C (commercial)
Uri ng Pagpapasok Surface Mount Surface Mount
Packhaging / Kaso 484-BBGA (FineLine BGA) —
Process Technology 0.18 µm CMOS —
Speed Grade C7 (7 ns) C8 (-8 commercial)
Silicon Status ES (Engineering Sample) —
Maximum Internal Frequency 375.94 MHz —
Tindminan RoHS [DATA_NEEDED: rohs_status] —
Number of PLLs [DATA_NEEDED: pll_count] —
Logic Elements — 8,320
System Gates — 200,000
Embedded Memory (RAM bits) — 106,496
Number of Logic Array Blocks (LABs) — 104
Number of Embedded System Blocks (ESBs) — 13
User I/O Pins (max) — 376
PLLs — 4
Core Voltage — 1.8 V
Packhaging — 484-pin FBGA (FineLine BGA)
Process Node — 0.18 micron CMOS
Configuration Interface — JTAG (IEEE 1149.1) / Altera serial
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL, SSTL, HSTL, AGP
Lead Free / RoHS — [DATA_NEEDED: lead-free status]

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