EP20K200CF484C8 vs EP20K200FC484-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200CF484C8 sa pamamagitan ng Intel at EP20K200FC484-2X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K200FC484-2X - 200K Gates APEX 20K FPGA, 484-FBGA | Intel / Altera
EP20K200FC484-2X ObsoletePagsanggunian na paghahambing
| Parametro | EP20K200CF484C8 | EP20K200FC484-2X |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX 20KC | APEX 20K |
| Logic Elements | 8,320 | — |
| System Gates | 200,000 | — |
| Embedded Memory Bits | 106,496 bits | — |
| Maximum User I/O | 376 | 382 |
| Packhaging | 484-FBGA (FineLine BGA, 23x23 mm) | 484-pin FBGA (FineLine BGA), 1.0 mm pitch |
| Process Technology | 0.15 µm CMOS | 0.22 µm CMOS |
| Core Voltage | 1.8 V | — |
| Temperature na Operasyon | Commercial (0C to +85C) | 0 °C to 85 °C (commercial) |
| Maximum Frequency | 301.21 MHz (per FPGAkey listing) | — |
| Embedded Memory Type | ESB (Embedded System Block) — RAM/ROM/CAM/FIFO | — |
| Configuration Modes | Passive Serial, Passive Parallel Synchronous, Active Serial | — |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, GTL+ | — |
| Tindminan RoHS | Non-compliant (per alterachips.com listing) | [DATA_NEEDED: RoHS compliance status] |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Series | — | EP20K200 |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Maximum Logic Elements | — | 8,320 cells |
| Typical System Gates | — | 200,000 |
| Embedded Memory (EAB) | — | 106,496 bits |
| Number of Logic Elements | — | 8,320 |
| Propagation Delay | — | 3.0 ns |
| Maximum Internal Frequency | — | 200 MHz |
| Core Supply Voltage | — | 2.5 V |
| Speed Grade | — | -2 (with LVDS support, "X" suffix) |
| Programmable I/O Standards | — | 1.8 V, 2.5 V, 3.3 V, LVTTL, LVCMOS, LVDS |
| JTAG Support | — | IEEE 1149.1 Boundary-Scan |