EP20K200EBC356-1N vs EP20K200EBC356-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200EBC356-1N sa pamamagitan ng Intel at EP20K200EBC356-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K200EBC356-1N | EP20K200EBC356-1 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX 20KE | APEX 20K (APEX 20KE) |
| Series | APEX-20KE | — |
| Logic Elements / Cells | 8,320 | 8,320 |
| Typical Gates | 200,000 | — |
| Number of Macrocells | 832 | — |
| User I/Os | 271 | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Internal Frequency (max) | 367 MHz | — |
| Process Technology | 0.22 um CMOS | 0.22 µm CMOS |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V (nominal 1.8 V) | — |
| I/O Supply Voltage | MultiVolt 1.8 V / 2.5 V / 3.3 V / 5.0 V | — |
| Packhaging | 356-BGA (LBGA, 35 x 35 mm) | 356-ball LBGA (35 x 35 mm) |
| Temperature na Operasyon | 0 C to +85 C (commercial) | 0 °C to 85 °C (Commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Level ng MSL | 3 (168 hours) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status not stated in verified sources] |
| Logic Family / Architecture | CMOS, MultiCore (LUT + embedded memory) | — |
| Configuration Method | SRAM-based, in-system programmable | JTAG (ByteBlaster / MasterBlaster), passive serial |
| System Gates | — | 200,000 |
| Maximum User I/Os | — | 277 |
| Core Voltage | — | 1.8 V (1.71 V to 1.89 V) |
| Internal Performance | — | Up to 367 MHz |
| Architecture | — | MultiCore (LUT + product-term + embedded memory) |
| On-chip Memory | — | Embedded System Blocks (ESB / SRAM) |
| Development Software | — | Altera Quartus II |
| Katayuan ng Lifecycle | — | Obsolete / EOL |