EP20K200EBC652-2X vs EP20K100EBC652-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200EBC652-2X sa pamamagitan ng Altera at EP20K100EBC652-2X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K200EBC652-2X | EP20K100EBC652-2X |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Series | APEX-20KE® | — |
| Family | APEX-20KE | APEX 20KE |
| Device Logic Elements | 8,320 | — |
| Number of LABs/CLBs | 832 | — |
| Total RAM Bits | 106,496 | — |
| Number of I/O Pins | 376 | — |
| Number of Gates | 200,000 (typical) | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Operating Temperature (TJ) | 0C to +85C | — |
| Packhaging | 652-BGA | 652-ball BGA (EBC652) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Process Technology | 0.18 um CMOS | 0.18 µm CMOS, SRAM-based |
| I/O Standard Support | LVTTL, LVCMOS, LVDS, PCI, GTL+, SSTL | — |
| Configuration Method | Serial or Parallel PROM, JTAG (IEEE 1149.1) | Passive Serial / Passive Parallel / JTAG (EPC) |
| Lead-Free / RoHS | Compliant (per DigiKey listing) | — |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 263,000 |
| Logic Elements | — | 4,160 |
| Embedded System Blocks (ESBs) | — | 26 |
| Maximum RAM Bits | — | 53,248 |
| Maximum User I/O Pins | — | 246 |
| Supply Voltage - Core | — | 1.8 V |
| Supply Voltage - I/O | — | 1.8 V / 2.5 V / 3.3 V |
| Speed Grade | — | -2 (faster commercial) |
| Temperature na Operasyon | — | 0C to +85C (commercial) |
| Clock Resources | — | Up to 4 DLLs, multiple global clocks |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |