EP20K200EBC652-2X vs EP20K200EBC652-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200EBC652-2X sa pamamagitan ng Altera at EP20K200EBC652-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K200EBC652-2X | EP20K200EBC652-3 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Series | APEX-20KE® | — |
| Family | APEX-20KE | APEX-20KE |
| Device Logic Elements | 8,320 | — |
| Number of LABs/CLBs | 832 | — |
| Total RAM Bits | 106,496 | 106,496 |
| Number of I/O Pins | 376 | — |
| Number of Gates | 200,000 (typical) | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Operating Temperature (TJ) | 0C to +85C | — |
| Packhaging | 652-BGA | 652-ball FineLine BGA (top-side, 1.27 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Process Technology | 0.18 um CMOS | — |
| I/O Standard Support | LVTTL, LVCMOS, LVDS, PCI, GTL+, SSTL | — |
| Configuration Method | Serial or Parallel PROM, JTAG (IEEE 1149.1) | — |
| Lead-Free / RoHS | Compliant (per DigiKey listing) | — |
| Logic Elements (LEs) | — | 8,320 |
| Logic Array Blocks (LABs) | — | 832 |
| Maximum User I/O Pins | — | 376 |
| Embedded System Blocks (ESBs) | — | Yes (dual-port RAM / ROM / CAM) |
| PLLs | — | 4 |
| Temperature na Operasyon | — | 0C to +85C (EBC - Enhanced Commercial) |
| Speed Grade | — | -3 |
| Configuration Mode | — | JTAG / PS / Passive-serial / Passive-parallel |
| Process Node | — | [DATA_NEEDED: process node] |
| Core Voltage | — | [DATA_NEEDED: core voltage] |
| Tindminan RoHS | — | Not RoHS (non-lead-free variant) |
| Katayuan ng Lifecycle | — | Obsolete - last time-buy period closed |