EP20K200EBC652-2X vs EP20K200EBC652-3 比較
詳細並排比較 EP20K200EBC652-2X 由 Altera 與 EP20K200EBC652-3 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K200EBC652-2X | EP20K200EBC652-3 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Series | APEX-20KE® | — |
| Family | APEX-20KE | APEX-20KE |
| Device Logic Elements | 8,320 | — |
| Number of LABs/CLBs | 832 | — |
| Total RAM Bits | 106,496 | 106,496 |
| Number of I/O Pins | 376 | — |
| Number of Gates | 200,000 (typical) | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Operating Temperature (TJ) | 0C to +85C | — |
| 封裝 | 652-BGA | 652-ball FineLine BGA (top-side, 1.27 mm pitch) |
| 安裝類型 | Surface Mount | Surface Mount |
| Process Technology | 0.18 um CMOS | — |
| I/O Standard Support | LVTTL, LVCMOS, LVDS, PCI, GTL+, SSTL | — |
| Configuration Method | Serial or Parallel PROM, JTAG (IEEE 1149.1) | — |
| Lead-Free / RoHS | Compliant (per DigiKey listing) | — |
| Logic Elements (LEs) | — | 8,320 |
| Logic Array Blocks (LABs) | — | 832 |
| Maximum User I/O Pins | — | 376 |
| Embedded System Blocks (ESBs) | — | Yes (dual-port RAM / ROM / CAM) |
| PLLs | — | 4 |
| 工作溫度 | — | 0C to +85C (EBC - Enhanced Commercial) |
| Speed Grade | — | -3 |
| Configuration Mode | — | JTAG / PS / Passive-serial / Passive-parallel |
| Process Node | — | [DATA_NEEDED: process node] |
| Core Voltage | — | [DATA_NEEDED: core voltage] |
| RoHS 狀態 | — | Not RoHS (non-lead-free variant) |
| 生命週期狀態 | — | Obsolete - last time-buy period closed |