EP20K200EFC484-2N vs EP20K200BC484-1X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200EFC484-2N sa pamamagitan ng Intel at EP20K200BC484-1X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K200BC484-1X - APEX-20K 200K-Gate FPGA 382 I/O 484-BGA | Altera
EP20K200BC484-1X ObsoletePagsanggunian na paghahambing
| Parametro | EP20K200EFC484-2N | EP20K200BC484-1X |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX-20KE | — |
| Product Type | FPGA - Field Programmable Gate Array | — |
| System Gates | 200,000 | — |
| Logic Elements | 8,320 | — |
| Total RAM Bits | 106,496 | 106496 |
| Embedded System Blocks (ESB) | 52 (True Dual-Port RAM) | — |
| Maximum User I/O | 376 | — |
| Packhaging | 484-FBGA (FineLine BGA), 23x23 mm, 1.0 mm pitch | — |
| Core Voltage | 1.8 V | — |
| Supply Voltage Range | 1.71 V to 1.89 V | — |
| Process Technology | 0.22 µm CMOS | — |
| Logic Family | CMOS | — |
| Propagation Delay (typ.) | 2.5 ns | — |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial) | 0C to +85C (commercial, [DATA_NEEDED: full Tjj range]) |
| Configuration Modes | Passive Serial, Passive Parallel Async, JTAG | — |
| PLLs | 4 | — |
| Speed Grade | -2 | -1 (slowest commercial grade) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Product Family | — | APEX-20K |
| Series | — | EP20K200 |
| Logic Elements / Cells | — | 8320 |
| Number of I/O | — | 382 |
| Number of Logic Gates | — | 200000 |
| Package Type | — | 484-BBGA (Fine-pitch Ball Grid Array) |
| Package Suffix | — | BC484 |
| Configuration Method | — | SRAM - external serial/parallel PROM |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| PLL | — | ClockLock / ClockBoost |
| Embedded Memory Blocks | — | Embedded System Blocks (ESBs) - RAM/ROM/CAM |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |