EP20K200FC484-1 vs EP20K200FC484-1N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200FC484-1 sa pamamagitan ng Altera at EP20K200FC484-1N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K200FC484-1 | EP20K200FC484-1N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | APEX 20K | APEX 20K |
| Logic Elements / Cells | 8320 | 8,320 |
| System Gates | 200 K | 200,000 (approx.) |
| Embedded Memory (RAM bits) | 106,496 bits | — |
| Number of I/Os | 382 | — |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | — |
| Core Supply Voltage | 2.5 V | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Maximum Operating Frequency | 250 MHz | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Temperature na Operasyon | 0 °C to 85 °C (Commercial) | 0 °C to +85 °C |
| Packhaging | 484-ball FBGA (FineLine BGA) | 484-FBGA (23 x 23 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Architecture | MultiCore (LUT + Embedded System Blocks) | MultiCore (LUT + product-term + embedded memory) |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Speed Grade | -1 (fastest bin) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Series | — | APEX-20K® |
| Maximum User I/O | — | 382 |
| Number of Macros | — | 832 |
| Supply Voltage (Core) | — | 2.5 V (2.375 V – 2.625 V) |
| Maximum Internal Frequency | — | 250 MHz |
| Package Code | — | BGA / FBGA |
| Number of Pins/balls | — | 484 |
| Lead-Free / RoHS | — | Compliant (per distributor listings) |
| Configuration Method | — | SRAM-based, JTAG/ByteBlaster |