EP20K200FC484-1N vs EP20K200FC484-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200FC484-1N sa pamamagitan ng Altera at EP20K200FC484-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K200FC484-1N | EP20K200FC484-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX 20K | APEX 20K |
| Series | APEX-20K® | — |
| Logic Elements / Cells | 8,320 | 8320 |
| System Gates | 200,000 (approx.) | 200 K |
| Maximum User I/O | 382 | — |
| Number of Macros | 832 | — |
| Supply Voltage (Core) | 2.5 V (2.375 V – 2.625 V) | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Maximum Internal Frequency | 250 MHz | — |
| Temperature na Operasyon | 0 °C to +85 °C | 0 °C to 85 °C (Commercial) |
| Packhaging | 484-FBGA (23 x 23 mm) | 484-ball FBGA (FineLine BGA) |
| Package Code | BGA / FBGA | — |
| Number of Pins/balls | 484 | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Compliant (per distributor listings) | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | MultiCore (LUT + Embedded System Blocks) |
| Configuration Method | SRAM-based, JTAG/ByteBlaster | — |
| Embedded Memory (RAM bits) | — | 106,496 bits |
| Number of I/Os | — | 382 |
| Number of LABs/CLBs | — | [DATA_NEEDED: LAB count] |
| Core Supply Voltage | — | 2.5 V |
| Maximum Operating Frequency | — | 250 MHz |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Speed Grade | — | -1 (fastest bin) |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |