EP20K200FC484-1N vs EP20K200FC484-1 比較
詳細並排比較 EP20K200FC484-1N 由 Altera 與 EP20K200FC484-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K200FC484-1N | EP20K200FC484-1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | APEX 20K | APEX 20K |
| Series | APEX-20K® | — |
| Logic Elements / Cells | 8,320 | 8320 |
| System Gates | 200,000 (approx.) | 200 K |
| Maximum User I/O | 382 | — |
| Number of Macros | 832 | — |
| Supply Voltage (Core) | 2.5 V (2.375 V – 2.625 V) | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Maximum Internal Frequency | 250 MHz | — |
| 工作溫度 | 0 °C to +85 °C | 0 °C to 85 °C (Commercial) |
| 封裝 | 484-FBGA (23 x 23 mm) | 484-ball FBGA (FineLine BGA) |
| Package Code | BGA / FBGA | — |
| Number of Pins/balls | 484 | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Compliant (per distributor listings) | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | MultiCore (LUT + Embedded System Blocks) |
| Configuration Method | SRAM-based, JTAG/ByteBlaster | — |
| Embedded Memory (RAM bits) | — | 106,496 bits |
| Number of I/Os | — | 382 |
| Number of LABs/CLBs | — | [DATA_NEEDED: LAB count] |
| Core Supply Voltage | — | 2.5 V |
| Maximum Operating Frequency | — | 250 MHz |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Speed Grade | — | -1 (fastest bin) |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |