EP20K200FC484-2X vs EP20K200FC484-1N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200FC484-2X sa pamamagitan ng Altera at EP20K200FC484-1N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K200FC484-2X - 200K Gates APEX 20K FPGA, 484-FBGA | Intel / Altera
EP20K200FC484-2X ObsoletePagsanggunian na paghahambing
| Parametro | EP20K200FC484-2X | EP20K200FC484-1N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | APEX 20K | APEX 20K |
| Series | EP20K200 | APEX-20K® |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Maximum Logic Elements | 8,320 cells | — |
| Typical System Gates | 200,000 | — |
| Embedded Memory (EAB) | 106,496 bits | — |
| Maximum User I/O | 382 | 382 |
| Number of Logic Elements | 8,320 | — |
| Propagation Delay | 3.0 ns | 2.5 ns |
| Maximum Internal Frequency | 200 MHz | 250 MHz |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Supply Voltage | 2.5 V | — |
| Packhaging | 484-pin FBGA (FineLine BGA), 1.0 mm pitch | 484-FBGA (23 x 23 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 °C to 85 °C (commercial) | 0 °C to +85 °C |
| Speed Grade | -2 (with LVDS support, "X" suffix) | — |
| Programmable I/O Standards | 1.8 V, 2.5 V, 3.3 V, LVTTL, LVCMOS, LVDS | — |
| JTAG Support | IEEE 1149.1 Boundary-Scan | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| Logic Elements / Cells | — | 8,320 |
| System Gates | — | 200,000 (approx.) |
| Number of Macros | — | 832 |
| Supply Voltage (Core) | — | 2.5 V (2.375 V – 2.625 V) |
| Package Code | — | BGA / FBGA |
| Number of Pins/balls | — | 484 |
| Lead-Free / RoHS | — | Compliant (per distributor listings) |
| Architecture | — | MultiCore (LUT + product-term + embedded memory) |
| Configuration Method | — | SRAM-based, JTAG/ByteBlaster |