EP20K200RC208-2 vs EP20K200RC208-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200RC208-2 sa pamamagitan ng Altera at EP20K200RC208-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K200RC208-2 | EP20K200RC208-3 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Series | APEX-20K | APEX 20K |
| Family | APEX-20K MultiCore FPGA | APEX-20K® |
| Logic Elements (LEs) | 8320 | — |
| System Gates | 200,000 (typical) | — |
| Embedded Memory (bits) | 106,496 | 106,496 |
| Maximum User I/O | 144 | — |
| Packhaging | 208-BQFP / 208-RQFP with Exposed Pad | 208-RQFP Exposed Pad (BFQFP) |
| Bilang ng Pin | 208 | — |
| Speed Grade | -2 (mid-speed, industrial) | -3 |
| Temperature na Operasyon | -40C to +85C (industrial) | -40°C to +85°C (Industrial) |
| Supply Voltage (Core) | [DATA_NEEDED: core VCC] | — |
| Supply Voltage (I/O) | 3.3 V (multi-standard I/O) | — |
| Configuration Interface | JTAG (IEEE 1149.1) + Altera legacy scheme | — |
| Process Technology | [DATA_NEEDED: process node] | 0.22 µm CMOS |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements / Cells | — | 8,320 |
| Total System Gates | — | 200,000 |
| Number of I/O Pins | — | 144 |
| Core Voltage | — | 1.8 V |
| I/O Standard | — | LVDS (3.3 V / 2.5 V) |
| Maximum Operating Frequency | — | 167 MHz |
| PLLs | — | 4 |
| Programming Interface | — | IEEE 1149.1 JTAG |
| In-System Programmable | — | Yes |
| Hot Socketing | — | Yes |