EP20K200RI240-2V vs EP20K200RC240-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200RI240-2V sa pamamagitan ng Altera at EP20K200RC240-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K200RI240-2V | EP20K200RC240-3 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Product Family | APEX 20K | — |
| Typical Gates | 200,000 | — |
| Logic Cells | 8,320 | — |
| Process Technology | 0.22 um | — |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 2.5 V / 3.3 V | — |
| Speed Grade | -2 | -3 (commercial, low-power) |
| Maximum Internal Clock Frequency | 200 MHz (distributor listing; Microchip USA records 160 MHz) | — |
| Maximum Clock Frequency (Microchip USA) | 160 MHz | — |
| Packhaging | 240-pin RQFP (S-PQFP-G240) | 240-BFQFP Exposed Pad (Plastic Quad Flat Pack) |
| Package Code | FQFP, square, gull-wing | — |
| Number of Terminals | 240 | — |
| Terminal Pitch | 0.500 mm | — |
| User I/O Lines | 174 | — |
| Dedicated Inputs | 4 | — |
| Operating Temperature Grade | Industrial (I suffix); exact range [DATA_NEEDED: operating temperature range] | — |
| Embedded Memory Bits | [DATA_NEEDED: embedded memory bits] | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Lifecycle | Obsolete | — |
| Series | — | APEX-20K |
| Device Family | — | Apex 20KE |
| Logic Elements / Cells | — | 8320 |
| System Gates | — | 106496 |
| Number of Logic Array Blocks (LABs) | — | 832 |
| Maximum User I/O | — | 174 |
| Embedded Memory Blocks (ESBs) | — | 4 |
| Total Embedded RAM Bits | — | 53248 bits |
| Number of I/O Banks | — | 8 |
| Core Supply Voltage (VCCINT) | — | 1.8 V (typ) |
| I/O Supply Voltage Range | — | 2.375 V to 2.625 V |
| Temperature na Operasyon | — | 0C to +85C |
| Configuration Mode | — | SRAM-based, JTAG / Passive Serial / Passive Parallel |
| JTAG Support | — | IEEE 1149.1 Boundary-Scan |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |