EP20K200RI240-2V vs EP20K200RC240-3 比較

詳細並排比較 EP20K200RI240-2V 由 Altera 與 EP20K200RC240-3 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K200RI240-2V EP20K200RC240-3
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Product Family APEX 20K —
Typical Gates 200,000 —
Logic Cells 8,320 —
Process Technology 0.22 um —
Core Supply Voltage 2.5 V —
I/O Supply Voltage 2.5 V / 3.3 V —
Speed Grade -2 -3 (commercial, low-power)
Maximum Internal Clock Frequency 200 MHz (distributor listing; Microchip USA records 160 MHz) —
Maximum Clock Frequency (Microchip USA) 160 MHz —
封裝 240-pin RQFP (S-PQFP-G240) 240-BFQFP Exposed Pad (Plastic Quad Flat Pack)
Package Code FQFP, square, gull-wing —
Number of Terminals 240 —
Terminal Pitch 0.500 mm —
User I/O Lines 174 —
Dedicated Inputs 4 —
Operating Temperature Grade Industrial (I suffix); exact range [DATA_NEEDED: operating temperature range] —
Embedded Memory Bits [DATA_NEEDED: embedded memory bits] —
安裝類型 Surface Mount Surface Mount
Lifecycle Obsolete —
Series — APEX-20K
Device Family — Apex 20KE
Logic Elements / Cells — 8320
System Gates — 106496
Number of Logic Array Blocks (LABs) — 832
Maximum User I/O — 174
Embedded Memory Blocks (ESBs) — 4
Total Embedded RAM Bits — 53248 bits
Number of I/O Banks — 8
Core Supply Voltage (VCCINT) — 1.8 V (typ)
I/O Supply Voltage Range — 2.375 V to 2.625 V
工作溫度 — 0C to +85C
Configuration Mode — SRAM-based, JTAG / Passive Serial / Passive Parallel
JTAG Support — IEEE 1149.1 Boundary-Scan
RoHS 狀態 — [DATA_NEEDED: RoHS status]

資料表與資源

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