EP20K300EBC652-3 vs EP20K300EBC652-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K300EBC652-3 sa pamamagitan ng Altera at EP20K300EBC652-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K300EBC652-3 | EP20K300EBC652-2 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Unknown |
| Series | APEX 20KE | — |
| Product Type | FPGA - Field Programmable Gate Array | Field Programmable Gate Array (FPGA) |
| Manufacturer | Altera (Intel Programmable Solutions Group) | — |
| Number of Logic Elements | 11,520 | — |
| Number of Logic Array Blocks (LABs) | 1152 | — |
| Number of Macros | 1152 | — |
| Total RAM Bits | 147,456 | 147456 bits |
| Number of User I/Os | 408 | — |
| Packhaging / Kaso | 652-BGA (45x45 mm) | — |
| Supplier Device Package | 652-BGA | — |
| Voltage - Supply | 1.71 V to 1.89 V | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 C to +85 C | [DATA_NEEDED: operating temperature range] |
| Speed Grade | -3 | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| I/O Standards Supported | LVDS, LVPECL, PCI, GTL+, SSTL-2/3, LVTTL | — |
| Device Family | — | APEX-20KE |
| Logic Cells | — | 11520 |
| Macros | — | 1152 |
| I/O Count | — | 408 |
| Volte ng Pagbibigay | — | 1.71 V to 1.89 V |
| Packhaging | — | 652-BGA |
| Package Dimensions | — | 45 mm x 45 mm |
| Technology | — | 0.22 um (reported for family variant) |
| Maksimum na Taktiko ng Oras | — | 350 MHz (reported for family variant) |
| Configuration Technology | — | SRAM-based programmable logic (family description) |
| Tindminan RoHS | — | unknown |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |