EP20K300EBC652-3 vs EP20K300EBC652-2 比較
詳細並排比較 EP20K300EBC652-3 由 Altera 與 EP20K300EBC652-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K300EBC652-3 | EP20K300EBC652-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Unknown |
| Series | APEX 20KE | — |
| Product Type | FPGA - Field Programmable Gate Array | Field Programmable Gate Array (FPGA) |
| Manufacturer | Altera (Intel Programmable Solutions Group) | — |
| Number of Logic Elements | 11,520 | — |
| Number of Logic Array Blocks (LABs) | 1152 | — |
| Number of Macros | 1152 | — |
| Total RAM Bits | 147,456 | 147456 bits |
| Number of User I/Os | 408 | — |
| 封裝 / 外殼 | 652-BGA (45x45 mm) | — |
| Supplier Device Package | 652-BGA | — |
| Voltage - Supply | 1.71 V to 1.89 V | — |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0 C to +85 C | [DATA_NEEDED: operating temperature range] |
| Speed Grade | -3 | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| I/O Standards Supported | LVDS, LVPECL, PCI, GTL+, SSTL-2/3, LVTTL | — |
| Device Family | — | APEX-20KE |
| Logic Cells | — | 11520 |
| Macros | — | 1152 |
| I/O Count | — | 408 |
| 供應電壓 | — | 1.71 V to 1.89 V |
| 封裝 | — | 652-BGA |
| Package Dimensions | — | 45 mm x 45 mm |
| Technology | — | 0.22 um (reported for family variant) |
| 最大時脈頻率 | — | 350 MHz (reported for family variant) |
| Configuration Technology | — | SRAM-based programmable logic (family description) |
| RoHS 狀態 | — | unknown |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |