EP20K300EFC672-1 vs EP20K300EBC652-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K300EFC672-1 sa pamamagitan ng Altera at EP20K300EBC652-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K300EBC652-1 - APEX 20KE 300K Gates FPGA, 652-BGA | Altera
EP20K300EBC652-1 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K300EFC672-1 | EP20K300EBC652-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | APEX 20KE | APEX 20KE |
| Product Type | FPGA (Field-Programmable Gate Array) | — |
| System Gates | 300,000 | — |
| Logic Elements | 11,520 | — |
| Embedded RAM Bits | 147,456 | — |
| User I/O | 408 | — |
| Packhaging | 672-ball FineLine BGA | — |
| Process Technology | 0.22 um CMOS | 0.22 µm CMOS |
| Core Supply Voltage | 1.8 V (1.71 V min, 1.89 V max) | — |
| Propagation Delay | 1.68 ns | — |
| Internal Frequency | 160 MHz (max performance grade up to 400 MHz) | — |
| Temperature na Operasyon | 0 C to 85 C (commercial) | 0C to +85C (industrial range varies) |
| I/O Standards Supported | LVCMOS, LVTTL, PCI, GTL+, SSTL-2/3, LVDS | — |
| Architecture | MultiCore (LUT + ESB) | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Logic Family | CMOS, SRAM-based | — |
| Tindminan RoHS | unknown | unknown |
| Series | — | APEX-20KE® |
| Number of Logic Elements / Cells | — | 11520 |
| Total RAM Bits | — | 147456 |
| Number of Gates | — | 300000 |
| Number of I/O | — | 408 |
| Voltage - Supply | — | 1.71 V to 1.89 V |
| Packhaging / Kaso | — | 652-BGA (45x45 mm) |
| Supplier Device Package | — | 652-BGA |
| Core Operating Frequency (max) | — | [DATA_NEEDED: confirm from datasheet typical perf] |
| LVDS Support | — | Yes (per APEX 20KE family specification) |
| In-System Programmable | — | Yes (JTAG via ByteBlasterMV/MasterBlaster) |