EP20K300EFC672-1N vs EP20K300EFC672-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K300EFC672-1N sa pamamagitan ng Altera at EP20K300EFC672-2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K300EFC672-1N | EP20K300EFC672-2 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KE | APEX 20KE |
| Series | APEX-20KE | APEX 20K |
| System Gates | 300,000 | 300,000 |
| Logic Elements (LEs) / Cells | 11,520 | — |
| Macros | 1,152 | — |
| Embedded Memory Bits | 147,456 bits | — |
| User I/O Pins | 408 | — |
| Supply Voltage (Core) | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Process Technology | 0.22 um CMOS | — |
| Maximum Internal Frequency | 160 MHz | 350 MHz |
| Propagation Delay | 1.68 ns | — |
| Packhaging / Kaso | 672-BBGA (FineLine BGA, 27x27 mm) | — |
| Supplier Device Package | 672-FBGA (27x27) | — |
| Temperature na Operasyon | 0 C to +85 C (commercial) | 0 °C to 85 °C (commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Logic Elements | — | 11,520 |
| Embedded Memory (ESB) | — | 147,456 bits |
| Maximum User I/O | — | 408 |
| Propagation Delay (pin-to-pin) | — | 1.68 ns |
| Logic Family | — | CMOS |
| Core Process Technology | — | 0.22 µm |
| Core Supply Voltage | — | 1.8 V |
| Packhaging | — | 672-pin FineLine BGA (FBGA) |
| Configuration Interface | — | Passive Serial / EPC / JTAG (IEEE 1149.1) |
| Programming Tool | — | Quartus II / MAX+PLUS II |