EP20K300EQC240-2 vs EP20K300EQI240-3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K300EQC240-2 sa pamamagitan ng Altera at EP20K300EQI240-3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K300EQC240-2 | EP20K300EQI240-3N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX-20KE® | APEX 20KE |
| Series | APEX 20K | EP20K300 |
| System Gates | 300,000 | 300,000 |
| Logic Elements / Cells | 11,520 | — |
| Embedded Memory (bits) | 147,456 | 147,456 |
| Maximum User I/Os | 152 | — |
| Internal Frequency (max) | 160 MHz | — |
| Propagation Delay | 1.68 ns | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Supply Voltage | 1.8 V | 1.8 V nominal (1.71 V min, 1.89 V max) |
| Speed Grade | -2 | -3 |
| Packhaging / Kaso | 240-BFQFP (PQFP, 32x32 mm) | — |
| Uri ng Pagpapasok | Surface Mount (Gull-Wing) | — |
| Logic Family | CMOS | — |
| Temperature na Operasyon | 0 °C to 85 °C (Commercial) | -40 °C to +105 °C (industrial 'I' grade) |
| I/O Standards | LVTTL, LVCMOS, PCI, LVDS (programmable) | — |
| Architecture | MultiCore™ with embedded system blocks (ESBs) | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance from data] |
| Programming Tool | Quartus II (legacy versions) | — |
| Logic Elements | — | 11,520 |
| Maximum User I/O | — | 152 |
| Dedicated Inputs | — | 4 |
| Packhaging | — | 240-pin BQFP/PQFP (PowerQuad Flat Pack) |
| I/O Standard Support | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V (multi-volt I/O) |
| Programming Interface | — | IEEE 1149.1 JTAG (ByteBlaster / MasterBlaster) |