EP20K30EFC324-2X vs EP20K30EFC324-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K30EFC324-2X sa pamamagitan ng Altera at EP20K30EFC324-3 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K30EFC324-2X | EP20K30EFC324-3 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Series | APEX-20KE | APEX-20KE |
| Family | APEX-20KE (1.8V, LVDS) | APEX 20KE (MultiCore architecture) |
| Manufacturer | Altera (Intel) | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Typical Gates | 30,000 | — |
| Logic Elements | 1,200 | — |
| Total RAM Bits | 24,576 | 24,576 |
| Maximum User I/O | 128 | — |
| Pin-to-Pin Delay | 2.69 ns | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | 1.71 V to 1.89 V (1.8 V nominal) |
| Process Technology | 0.22 micrometer | 1.8 V, 0.18 micrometer CMOS |
| Packhaging / Kaso | 324-BGA (FineLine) | — |
| Supplier Device Package | 324-FBGA (19x19 mm) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to 85C [DATA_NEEDED: full industrial range] | — |
| I/O Standard Support | LVDS, LVTTL, LVCMOS, PCI | — |
| PLL Count | 4 | — |
| Speed Grade | -2X | -3 |
| Configuration Method | Serial / Parallel PROM or flash | — |
| Typical Gate Count | — | 30,000 gates |
| Macrocells | — | 128 |
| Logic Elements (approx.) | — | 1,200 |
| User I/O | — | 120 |
| Packhaging | — | 324-FBGA (19 mm x 19 mm) |
| Operating Temperature (max) | — | 85 C |
| Level ng MSL | — | 3 |
| Peak Reflow Temperature | — | 220 C |
| LVDS I/O Support | — | Yes |
| Programming Interface | — | JTAG (in-system programmable) |
| Tindminan RoHS | — | unknown |