EP20K30EFC324-2X vs EP20K30EFC324-3 比較
詳細並排比較 EP20K30EFC324-2X 由 Altera 與 EP20K30EFC324-3 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K30EFC324-2X | EP20K30EFC324-3 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Series | APEX-20KE | APEX-20KE |
| Family | APEX-20KE (1.8V, LVDS) | APEX 20KE (MultiCore architecture) |
| Manufacturer | Altera (Intel) | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Typical Gates | 30,000 | — |
| Logic Elements | 1,200 | — |
| Total RAM Bits | 24,576 | 24,576 |
| Maximum User I/O | 128 | — |
| Pin-to-Pin Delay | 2.69 ns | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | 1.71 V to 1.89 V (1.8 V nominal) |
| Process Technology | 0.22 micrometer | 1.8 V, 0.18 micrometer CMOS |
| 封裝 / 外殼 | 324-BGA (FineLine) | — |
| Supplier Device Package | 324-FBGA (19x19 mm) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0C to 85C [DATA_NEEDED: full industrial range] | — |
| I/O Standard Support | LVDS, LVTTL, LVCMOS, PCI | — |
| PLL Count | 4 | — |
| Speed Grade | -2X | -3 |
| Configuration Method | Serial / Parallel PROM or flash | — |
| Typical Gate Count | — | 30,000 gates |
| Macrocells | — | 128 |
| Logic Elements (approx.) | — | 1,200 |
| User I/O | — | 120 |
| 封裝 | — | 324-FBGA (19 mm x 19 mm) |
| Operating Temperature (max) | — | 85 C |
| MSL 等級 | — | 3 |
| Peak Reflow Temperature | — | 220 C |
| LVDS I/O Support | — | Yes |
| Programming Interface | — | JTAG (in-system programmable) |
| RoHS 狀態 | — | unknown |