EP20K30ETC144-3N vs EP20K30ETC144-1X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K30ETC144-3N sa pamamagitan ng Altera at EP20K30ETC144-1X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K30ETC144-3N - 30K Gates APEX-20KE FPGA, 144-TQFP | Altera/Intel
EP20K30ETC144-3N ⚠ Huling PagbiliIntel
EP20K30ETC144-1X - APEX-20KE FPGA, 30K Gates, 92 I/O, 144-LQFP | Intel
EP20K30ETC144-1X ObsoletePagsanggunian na paghahambing
| Parametro | EP20K30ETC144-3N | EP20K30ETC144-1X |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | APEX-20KE | APEX 20K |
| Series | APEX 20K | APEX-20KE |
| Logic Elements | 1200 | — |
| System Gates | 30000 | — |
| Embedded RAM Bits | 24576 | — |
| Macrocells | 192 | — |
| User I/Os | 92 | — |
| Packhaging | 144-pin TQFP (TQFP-144 / ETQFP144) | 144-LQFP (20x20 mm, 0.5 mm pitch) |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Voltage | 1.8 V | 1.8 V |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) | — |
| Propagation Delay (pin-to-pin) | 1.68 ns (speed grade -3) | — |
| Internal Performance | 435 MHz (per legacy datasheet) | — |
| Temperature na Operasyon | 0 °C to +85 °C (commercial, 'N' suffix) | 0 °C to +85 °C (TJ) |
| Uri ng Pagpapasok | Surface Mount (gull-wing) | Surface Mount |
| Tindminan RoHS | Compliant (per legacy Altera declaration) | [DATA_NEEDED: confirm current RoHS compliance vs original leaded LQFP] |
| Lead-Free | Yes | — |
| Typical Gates | — | 30,000 |
| Maximum System Gates | — | 113,000 |
| Number of Logic Elements / Cells | — | 1,200 |
| Number of LABs / CLBs | — | 120 |
| Total RAM Bits | — | 24,576 |
| Number of User I/Os | — | 92 |
| Supply Voltage (Core) | — | 1.71 V to 1.89 V |
| Propagation Delay | — | 1.68 ns (per datasheet graph reference) |
| Internal Frequency (max) | — | 160 MHz (per DigChip datasheet entry) |
| Configuration | — | SRAM-based, in-system programmable |