EP20K400BC652-1V vs EP20K400BC652-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400BC652-1V sa pamamagitan ng Altera at EP20K400BC652-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400BC652-1V | EP20K400BC652-3 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX-20KC | — |
| Family | APEX 20K | APEX 20K |
| Device Sub-Family | EP20K400 | — |
| System Gates | 1,052,000 | — |
| Maximum Logic Elements | 212,992 | — |
| Macrocells / LABs | 16640 | — |
| Embedded Memory (bits) | 212,992 | 212,992 |
| Maximum User I/O | 502 | — |
| Speed Grade | -1 | -3 |
| Clock-to-Output (Tco) | 2.5 ns | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V | — |
| Packhaging | 652-BGA (FineLine, 45 x 45 mm) | BGA-652 (BC652) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +85C (commercial) | 0 C to +85 C |
| Configuration | SRAM-based, JTAG IEEE 1149.1 | — |
| Architecture | MultiCore (LUT + product-term + ESB) | MultiCore (LUT + product-term + embedded memory) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Logic Elements | — | 16,640 |
| Macro Cells | — | 1,664 |
| Maximum User I/Os | — | 502 |
| Number of I/O Banks | — | 8 |
| Supply Voltage (Core) | — | 2.5 V |
| Propagation Delay | — | 3.6 ns |
| Process Technology | — | CMOS |
| Configuration Interface | — | JTAG (IEEE 1149.1), ByteBlaster |
| Design Software | — | Quartus II (legacy) |