EP20K400BC652-1V vs EP20K400EBC652-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400BC652-1V sa pamamagitan ng Altera at EP20K400EBC652-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K400EBC652-1 - APEX-20KE FPGA, 400K Gates, 488 I/O, 652-BGA | Altera
EP20K400EBC652-1 ObsoletePagsanggunian na paghahambing
| Parametro | EP20K400BC652-1V | EP20K400EBC652-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX-20KC | APEX-20KE |
| Family | APEX 20K | APEX-20KE Field Programmable Gate Array |
| Device Sub-Family | EP20K400 | — |
| System Gates | 1,052,000 | — |
| Maximum Logic Elements | 212,992 | — |
| Macrocells / LABs | 16640 | — |
| Embedded Memory (bits) | 212,992 | — |
| Maximum User I/O | 502 | — |
| Speed Grade | -1 | -1 (fastest commercial) |
| Clock-to-Output (Tco) | 2.5 ns | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V | — |
| Packhaging | 652-BGA (FineLine, 45 x 45 mm) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +85C (commercial) | 0 C to 85 C (commercial) |
| Configuration | SRAM-based, JTAG IEEE 1149.1 | — |
| Architecture | MultiCore (LUT + product-term + ESB) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 16,640 |
| Number of Macros | — | 1664 |
| Total RAM Bits | — | 212,992 |
| Number of I/O | — | 488 |
| User I/Os (max, depending on configuration) | — | 502 |
| Number of Gates (typical) | — | 400,000 |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (nominal 1.8 V) |
| I/O Supply Voltage (VCCIO) | — | 2.5 V |
| Logic Family | — | CMOS |
| Propagation Delay | — | 2.5 ns |
| Packhaging / Kaso | — | 652-BGA (45x45 mm) |