EP20K400BC652-1V vs EP20K400EBC652-1 比較
詳細並排比較 EP20K400BC652-1V 由 Altera 與 EP20K400EBC652-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP20K400EBC652-1 - APEX-20KE FPGA, 400K Gates, 488 I/O, 652-BGA | Altera
EP20K400EBC652-1 Obsolete規格比較
| 參數 | EP20K400BC652-1V | EP20K400EBC652-1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | APEX-20KC | APEX-20KE |
| Family | APEX 20K | APEX-20KE Field Programmable Gate Array |
| Device Sub-Family | EP20K400 | — |
| System Gates | 1,052,000 | — |
| Maximum Logic Elements | 212,992 | — |
| Macrocells / LABs | 16640 | — |
| Embedded Memory (bits) | 212,992 | — |
| Maximum User I/O | 502 | — |
| Speed Grade | -1 | -1 (fastest commercial) |
| Clock-to-Output (Tco) | 2.5 ns | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V | — |
| 封裝 | 652-BGA (FineLine, 45 x 45 mm) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0C to +85C (commercial) | 0 C to 85 C (commercial) |
| Configuration | SRAM-based, JTAG IEEE 1149.1 | — |
| Architecture | MultiCore (LUT + product-term + ESB) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 16,640 |
| Number of Macros | — | 1664 |
| Total RAM Bits | — | 212,992 |
| Number of I/O | — | 488 |
| User I/Os (max, depending on configuration) | — | 502 |
| Number of Gates (typical) | — | 400,000 |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (nominal 1.8 V) |
| I/O Supply Voltage (VCCIO) | — | 2.5 V |
| Logic Family | — | CMOS |
| Propagation Delay | — | 2.5 ns |
| 封裝 / 外殼 | — | 652-BGA (45x45 mm) |