EP20K400BC652-1XV vs EP20K400GC655-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400BC652-1XV sa pamamagitan ng Intel at EP20K400GC655-1 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K400BC652-1XV - 400K APEX-20K FPGA, 502 I/O, 652-BGA | Intel / Altera
EP20K400BC652-1XV ObsoleteIntel
EP20K400GC655-1 - 400K Gate APEX 20K FPGA, 655-pin CPGA | Intel/Altera
EP20K400GC655-1 ObsoletePagsanggunian na paghahambing
| Parametro | EP20K400BC652-1XV | EP20K400GC655-1 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX-20K | EP20K400 |
| Family | APEX-20K Field Programmable Gate Array | APEX 20K |
| Number of Logic Elements / Cells | 16640 | — |
| Number of LABs / CLBs | 1664 | — |
| Total RAM Bits | 212992 | 212,992 |
| Number of Gates | 1052000 | — |
| Number of User I/O | 502 | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Supply Voltage na Operasyon | 2.375 V to 2.625 V (nominal 2.5 V) | — |
| Logic Family | CMOS | — |
| Technology Node | 0.22 µm | — |
| Hanay ng Temperature na Operasyon | 0°C to 85°C (TJ) | — |
| Packhaging | 652-LBGA (BGA-652) | 655-pin CPGA (Ceramic Pin Grid Array) |
| Uri ng Pagpapasok | Surface Mount | Through-Hole |
| Package Code | LBGA, square, ball terminals | — |
| Logic Elements | — | 16,640 |
| Maximum Gates | — | 1,052,000 |
| Typical Gates | — | 400,000 |
| Embedded System Blocks (ESBs) | — | 4 |
| Maximum User I/O | — | 502 |
| Dedicated Inputs | — | 6 |
| Process Technology | — | 0.22 µm CMOS |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 3.3 V |
| Maximum Internal Frequency | — | 250 MHz |
| Bilang ng Pin | — | 655 |
| Temperature na Operasyon | — | 0 °C to +85 °C (commercial) |
| Configuration Modes | — | Passive Serial, Passive Parallel Async, Passive Parallel Sync |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Tindminan RoHS | — | Non-compliant (contains lead in ceramic package) |