EP20K400CB652C7ES vs EP20K400CB652C9N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CB652C7ES sa pamamagitan ng Altera at EP20K400CB652C9N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400CB652C7ES | EP20K400CB652C9N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Series | APEX 20KC | EP20K400 |
| Family | FPGA APEX 20KC | APEX 20KC |
| System Gates | 400,000 | 400,000 |
| Logic Cells | 16,640 | — |
| Number of Inputs | 488 | — |
| Number of I/O Lines | 484 | — |
| Bilang ng Outputs | 484 | — |
| Propagation Delay | 1.4 ns | 2.0 ns |
| Maksimum na Taktiko ng Oras | 1666.6 MHz | — |
| Internal Performance | 375.94 MHz | — |
| Process Technology | 0.15 µm | — |
| Core Supply Voltage | 1.8 V | — |
| Package Type | BGA (S-PBGA-B652) | — |
| Number of Terminals | 652 | — |
| Package Body Material | Plastic / Epoxy | — |
| Surface Mount | Yes | — |
| Speed Grade | C7 | — |
| Temperature na Operasyon | [DATA_NEEDED: Operating temperature] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS] | Unknown (legacy Altera part - verify with distributor) |
| Device Type | — | Programmable Logic Device (SOPC FPGA) |
| Architecture | — | MultiCore (LUT logic + Embedded System Blocks) |
| Logic Elements | — | 16,640 |
| Maximum User I/Os | — | 502 |
| Total Memory Bits | — | 212,992 (per chip) |
| Maximum Internal Frequency | — | 250 MHz |
| Logic Family | — | CMOS |
| Core Process Technology | — | 0.15 µm all-layer copper CMOS |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V |
| Hanay ng Temperature na Operasyon | — | 0 °C to +85 °C (Commercial) |
| Packhaging | — | BGA-652 (Plastic Ball Grid Array, 652 balls) |
| Uri ng Pagpapasok | — | Surface Mount |
| Configuration Interface | — | IEEE 1149.1 JTAG, serial passive parallel async |