EP20K400CF672C-7ES vs EP20K400CF672C-8 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CF672C-7ES sa pamamagitan ng Altera at EP20K400CF672C-8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K400CF672C-7ES EP20K400CF672C-8
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family APEX 20KC APEX 20K
Series EP20K400 —
System Gates 400,000 —
Logic Elements 16,640 16,640
Embedded Memory (bits) 212,992 —
Maximum User I/O 488 488
Number of PLLs 4 —
Embedded Array Blocks (EABs) [DATA_NEEDED: EAB count from datasheet] —
Process Technology 0.15 um CMOS 0.15 µm all-layer copper CMOS
Core Voltage 1.8 V —
Speed Grade -7 -8
Maximum Internal Clock Frequency 375.94 MHz —
Propagation Delay (per Sierra IC) 1.400 ns —
Hanay ng Temperature na Operasyon 0 C to 85 C (commercial) —
Packhaging 672-BGA (FineLine BGA, 1.00 mm pitch) —
Uri ng Pagpapasok Surface Mount Surface Mount (BGA)
Tindminan RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS compliance]
Configuration Support EPC16, EPC8, EPC4, EPC2, EPC1 serial devices; JTAG —
Typical Gates — 400,000
Macros — 1,664
Number of I/O Banks — [DATA_NEEDED: number of I/O banks]
Package Type — PBGA-672 (FineLine BGA, 27 x 27 mm, 1.0 mm pitch)
Core Voltage (VCCINT) — 1.8 V nominal (1.71 V to 1.89 V)
I/O Voltage (VCCIO) — [DATA_NEEDED: VCCIO options]
Pin-to-Pin Delay (tPD) — 1.78 ns (speed grade -8)
Temperature Grade (C) — Commercial, 0 °C to 85 °C
Embedded Memory Type — ESB (RAM / ROM / CAM)
Configuration Interface — JTAG (IEEE 1149.1), Passive Serial, Passive Parallel
JTAG Support — Yes (IEEE 1149.1 boundary-scan)
Level ng MSL — [DATA_NEEDED: MSL level]

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