EP20K400CF672C9 vs EP20K400CF672C8AA Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CF672C9 sa pamamagitan ng Altera at EP20K400CF672C8AA sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K400CF672C9 - APEX-20K 400K Gates FPGA, 672-FBGA | Intel / Altera
EP20K400CF672C9 Obsolete
Pagsanggunian na paghahambing
| Parametro | EP20K400CF672C9 | EP20K400CF672C8AA |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX-20KC | — |
| Logic Family / Architecture | MultiCore (LUT + ESB) | — |
| System Gates | 400,000 | — |
| Logic Cells / Elements | 16,640 | — |
| Maximum User I/Os | 488 | — |
| Packhaging / Kaso | 672-BBGA, FCBGA | — |
| Supplier Device Package | 672-FBGA (27x27 mm) | — |
| Ball Pitch | 1.0 mm | — |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O VCCIO range] | — |
| Process Technology | 0.22 um CMOS | — |
| Internal Maximum Frequency | 368 MHz | — |
| Propagation Delay | 2.5 ns | [DATA_NEEDED: typical propagation delay] |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0 C to 85 C (Commercial) |
| Embedded Memory | Embedded System Blocks (ESB) | — |
| Configuration Method | Serial / Parallel PROM | — |
| Tindminan RoHS | RoHS non-compliant (legacy) | [DATA_NEEDED: RoHS status] |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Family | — | APEX 20K |
| Number of Logic Elements/Cells | — | 16640 |
| Number of Logic Units (LEs) | — | [DATA_NEEDED: number of LUs] |
| Embedded System Blocks (ESBs) | — | 212 |
| On-chip RAM Bits | — | [DATA_NEEDED: total embedded memory bits] |
| Number of User I/O Pins | — | 488 |
| Package Type | — | 672-ball Fine-Pitch BGA (FBGA) |
| Number of Pins/Balls | — | 672 |
| Supply Voltage (Core) | — | 2.5 V |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, HSTL (multi-voltage I/O) |
| Packaging | — | Tray |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | — | 3 (168 Hours) |
| Configuration Interface | — | JTAG (IEEE 1149.1), passive serial, passive parallel asynchronous |